Investigating the NBTI effect on P- and N-substrate MOS capacitors and p-MOSFET transistors

Abstract

Using measure/stress/measure (MSM) protocol, Negative bias temperature instability (NBTI) has been investigated on P-and N-substrate MOS capacitors through flat band shift evolution. The same protocol on p-MOSFET's transistors, with different channel lengths, has been also examined through threshold voltage shift evolution. The results have shown that P-substrate MOS capacitors are more affected than N-substrate MOS capacitors. We have suggested that the amphoteric nature of interface traps and the positive nature of the oxide traps could explain this result. In addition, the exponent n is higher in N-substrate than in P-substrate capacitors. Higher the degradation is, lower n is. On the other hand, we have shown that P-doped lightly doped drain (LDD) and source/drain regions of p-MOSFET transistors are more affected than the middle of the channel under NBTI stress conditions. These results point out the influence of the Boron doping on the NBTI degradation. Also, this behavior suggests that the generation mechanism in the edge region is different from that in the channel region.