X. Guan, Guang Chen, Lin Lin, Xin Wang, Albert Wang, Lee Yang, B. Zhao
{"title":"A new ESD-aware power amplifier design method","authors":"X. Guan, Guang Chen, Lin Lin, Xin Wang, Albert Wang, Lee Yang, B. Zhao","doi":"10.1109/ICASIC.2007.4415890","DOIUrl":null,"url":null,"abstract":"This paper presents a new ESD-aware power amplifier (PA) design method, featuring S-parameter modeling and output impedance re-matching techniques, to achieve ESD+PA full-chip design optimization. The new method is verified using a 5 kV ESD-protected 2.4 GHz PA circuit designed and implemented in a 0.18 mum RFCMOS technology. Experiment shows substantial performance degradation of PA due to ESD effect, which can be recovered by using the new ESD-aware ESD design method.","PeriodicalId":120984,"journal":{"name":"2007 7th International Conference on ASIC","volume":"6 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 7th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2007.4415890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a new ESD-aware power amplifier (PA) design method, featuring S-parameter modeling and output impedance re-matching techniques, to achieve ESD+PA full-chip design optimization. The new method is verified using a 5 kV ESD-protected 2.4 GHz PA circuit designed and implemented in a 0.18 mum RFCMOS technology. Experiment shows substantial performance degradation of PA due to ESD effect, which can be recovered by using the new ESD-aware ESD design method.
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