Co-design of antenna, matching network and voltage rectifier in state-of-the-art CMOS

Abstract

The demand for wireless-powered circuits are increasing rapidly, RFID and WSN are good examples. One of the most important components is the on-chip voltage rectifier. Research has been conducted intensively on the rectifier design, however not many of them considered the co-design with antennas and matching networks. This paper intends to fill this gap. An analysis on the co-design is presented. A new look-up table design methodology is proposed and simulations are done using Cadence to prove the methodology.