{"title":"High efficiency 450W asymmetric three-device Doherty amplifier with digital feedback predistortion","authors":"J. Staudinger, G. Bouisse, J. Kinney","doi":"10.1109/RWS.2010.5434115","DOIUrl":null,"url":null,"abstract":"An asymmetric Doherty power amplifier based upon a three-device architecture for improved efficiency performance under extended power backoff operation is presented. The topology provides significant advantages in easing input/output matching constraints inherent in asymmetric Doherty amplifiers where the asymmetry necessitates unequal device geometries for the peaking and carrier sub-amplifier circuits. Excellent high efficiency performance (45% @ 8 dB power back-off) is demonstrated by implementing the Doherty amplifier using an advanced prototype LDMOS device technology developed at Freescale Semiconductor. The amplifier achieves a saturated output power greater than 450W at 2.14 GHz when biased with a 28V supply. When driven with a single carrier W-CDMA signal, an efficiency of 45% is achieved at 8 dB power back-off. Moreover, when linearized with a digital feedback pre-distorter the amplifier achieves an ACPR better than −55 dB.","PeriodicalId":334671,"journal":{"name":"2010 IEEE Radio and Wireless Symposium (RWS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Radio and Wireless Symposium (RWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS.2010.5434115","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
An asymmetric Doherty power amplifier based upon a three-device architecture for improved efficiency performance under extended power backoff operation is presented. The topology provides significant advantages in easing input/output matching constraints inherent in asymmetric Doherty amplifiers where the asymmetry necessitates unequal device geometries for the peaking and carrier sub-amplifier circuits. Excellent high efficiency performance (45% @ 8 dB power back-off) is demonstrated by implementing the Doherty amplifier using an advanced prototype LDMOS device technology developed at Freescale Semiconductor. The amplifier achieves a saturated output power greater than 450W at 2.14 GHz when biased with a 28V supply. When driven with a single carrier W-CDMA signal, an efficiency of 45% is achieved at 8 dB power back-off. Moreover, when linearized with a digital feedback pre-distorter the amplifier achieves an ACPR better than −55 dB.
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