Modeling of $0.18\mu\mathrm{m}$ RF Bulk and SOI Planar MOSFETs using Industry Standard BSIM Models

Aarti Rathi, M. Kumar, Jayhind K. Verma, H. S. Jatana, Y. Chauhan, A. Dixit
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Abstract

In this paper, parameters are extracted for scalable DC and RF models of bulk & SOI MOSFETs using industry-standard models: BSIM-BULK and BSIM-SOI respectively. These made-in-India devices were fabricated by Semiconductor Laboratory, Chandigarh using $0.18\mu\mathrm{m}$ CMOS technology. One of the main reasons for choosing BSIM BULK over BSIM4 model for analog and RF applications is to ensure continuous drain current and its higher order derivatives w.r.t. bias voltages. This is not possible in the threshold voltage based BSIM3 and BSIM4 models due to asymmetry around $\text{Vds}=0\ \mathrm{V}$. BSIM BULK being a charge-based and body reference model does not suffer from this issue. The models show a high degree of correlation across geometries, biases, and frequencies. We have simulated circuits using the extracted RF Bulk and RF SOI FET models, such as the ring oscillator and Low Noise Amplifier. Performance of Bulk and SOI circuits is compared in terms of speed and noise figure.
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使用工业标准BSIM模型建模$0.18\mu\ mathm {m}$ RF块体和SOI平面mosfet
在本文中,分别使用工业标准模型BSIM-BULK和BSIM-SOI提取了块体和SOI mosfet的可扩展直流和射频模型的参数。这些印度制造的器件是由昌迪加尔半导体实验室采用$0.18\mu\math {m}$ CMOS技术制造的。在模拟和射频应用中选择BSIM BULK而不是BSIM4模型的主要原因之一是确保连续漏极电流及其高阶导数w.r.t.偏置电压。这在基于阈值电压的BSIM3和BSIM4模型中是不可能的,因为$\text{Vds}=0\ \mathrm{V}$周围不对称。BSIM BULK是基于电荷和主体的参考模型,不受此问题的影响。这些模型显示了几何形状、偏差和频率之间的高度相关性。我们使用提取的RF Bulk和RF SOI FET模型模拟电路,例如环形振荡器和低噪声放大器。从速度和噪声系数方面比较了Bulk和SOI电路的性能。
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