Statistical electrical and failure analysis of electromigration in advanced CMOS nodes for accurate design rules checker

Abstract

This paper introduces for the first time a new test structure for electromigration which allows increased statistics and reliability tests in a testchip under typical High Temperature Operating Life experimental ranges. Following the electrical analysis, a large panel of failure analysis methodologies was suitably used to categorize defects such as size, location, resistance impact, etc. This thorough analysis allows us to confirm that silicon failures are accurately predicted by our electromigration checker, based on reliability design rules.