Opposition Harmony Search algorithm based optimal sizing of CMOS analog amplifier circuit

Abstract

Optimal design of Complementary Metal Oxide Semiconductor (CMOS) differential amplifier circuit using Opposition based Harmony Search technique (OHS) is reported in this work. The original Harmony Search (HS) algorithm is chosen as heart of the OHS for near-global convergence. Each solution in Harmony Memory (HM) is generated on the basis of memory consideration rule, a pitch adjustment rule and a reinitialization process which gives the optimum result corresponding to the least error fitness in multidimensional search space. Incorporation of different control parameters in basic HS algorithm results in balancing of exploration and exploitation of search space. The proposed OHS based CMOS analog amplifier circuit design has alleviated from inherent drawbacks of premature convergence and stagnation, unlike Genetic Algorithm (GA), Particle Swarm Optimization (PSO) and Differential Evolution (DE). To confirm the superiority of the OHS based technique, SPICE simulation is also carried out by using the optimized parameters achieved by employing OHS. Results presented for the optimally designed amplifier circuit confirm the superiority of the proposed OHS based technique over DE, harmony search (HS), artificial bee colony (ABC) and PSO in terms of convergence speed, design criteria and design objectives. Simulation results confirm that OHS based designed amplifier circuit not only provides the least MOS transistor area, but it also provides improved gain and dissipates least power than the reported works.