Supporting hardware trade analysis and cost estimation using design complexity

P.W. Salchak, P. Chawla
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引用次数: 5

Abstract

Defines and illustrates a hardware design complexity measure (HDCM) and describe its potential applications to trade-off analysis and cost estimation. Specifically, we define a VHDL complexity measure. We have derived the HDCM from an avionics software design complexity measure (ASDCM) that we have shown to be effective in estimation and optimization of overall software costs. Similar to the ASDCM, we believe that the proposed HDCM could enable more optimal hardware design, implementation and maintenance.
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支持硬件交易分析和使用设计复杂性的成本估算
定义并说明硬件设计复杂性度量(HDCM),并描述其在权衡分析和成本估算中的潜在应用。具体来说,我们定义了一个VHDL复杂度度量。我们已经从航空电子软件设计复杂性度量(ASDCM)中导出了HDCM,我们已经证明该度量在估计和优化总体软件成本方面是有效的。与ASDCM类似,我们认为HDCM可以实现更优化的硬件设计、实现和维护。
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