Simple Methodology to Model On-Chip Inductors for CMOS RF Integrated Circuits Design

Abstract

This work presents an analytical method to extract the elements of the asymmetric single-$\pi$ electrical equivalent circuit of on-chip inductors. The elements are extracted from linear regression using the y-parameters of the chip inductors. The high correlation of the S-parameters between the model and the measurement of an on-chip inductor manufactured under the 0.5 $\mu{\mathrm{m}}$ CMOS process and electromagnetic simulation data based on the 0.13 $\mu{\mathrm{m}}$ CMOS process validates the proposed methodology up to 20 GHz.