Low-power, 4.6-GHz, Stable Oscillator for CSAC.

Abstract

The chip-scale atomic clock (CSAC) requires a microwave source to interrogate the Cs ground-state hyperfine resonance in a scheme where the oscillator's frequency is half of the 9.2 GHz resonance frequency. This paper describes the design and implementation of a 4.6 GHz voltage-controlled oscillator (VCO) with relative frequency stability of 6.5middot10-9 for measurement times of 1 second. The tuning range has been measured to be larger than 4 MHz. The VCO is designed using a modified Colpitts circuit topology and has a power consumption of about 10 mW. Similar oscillators have been demonstrated which exhibit slightly lower power consumption but 5 times worse frequency stability (Brannon, 2005)