Simulated monolithically integrated single photon counter

D. Cronin, A. M. Moloney, A. Morrison
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引用次数: 12

Abstract

Simulations of a Geiger-mode avalanche photodiode (GMAP) monolithically integrated with its corresponding active quench and reset circuit (AQRC) are presented. The AQRC design is simulated in Agilent's ADS simulator using BSIM3 MOSFET models acquired from Europractice's 0.6 /spl mu/m CMOS process. The novelty of the design ensures a minimum dead-time of 13 ns between adjacent incident photons. This corresponds to a maximum achievable saturated count-rate of 77 Mcounts/sec, not previously reported.
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模拟单片集成单光子计数器
对盖格模式雪崩光电二极管(GMAP)及其相应的有源猝灭复位电路(AQRC)进行了仿真研究。AQRC设计在Agilent的ADS模拟器中进行仿真,使用从Europractice的0.6 /spl mu/m CMOS工艺中获得的BSIM3 MOSFET模型。新颖的设计保证了相邻入射光子之间的最小死区时间为13 ns。这对应于77 Mcounts/sec的最大可实现饱和计数率,以前没有报道过。
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