K. A. Yusof, Nurul Izzati Mohammad Noh, S. H. Herman, A. Abdullah, M. Hussin, W. Abdullah
{"title":"Effect of source-drain metal shield in FET structure on drain leakage current","authors":"K. A. Yusof, Nurul Izzati Mohammad Noh, S. H. Herman, A. Abdullah, M. Hussin, W. Abdullah","doi":"10.1109/RSM.2013.6706482","DOIUrl":null,"url":null,"abstract":"This study presents the effect of source-drain metal shield in FET structure on drain leakage current. The FET structure was fabricated on the wafer by using MIMOS's standard fabrication process. Aluminum (Al) was sputtered with thickness of 400 nm as metal shield layer at the source and drain area of FET structure. There are four different layout designs of source-drain metal shield that were tested by Keithley 236 current-voltage sourcing under light and dark conditions. The measurements were carried out in a dark box with controllable light intensity. Besides the drain leakage current investigation, this study also investigates the light effect of various layout designs with source-drain metal shield on FET structure. It was found that the layout design with source-drain metal shield has lower drain leakage current compared to the layout design without source-drain metal shield. However, the various layout design of source-drain metal shield cannot eliminate the light effect.","PeriodicalId":346255,"journal":{"name":"RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RSM.2013.6706482","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This study presents the effect of source-drain metal shield in FET structure on drain leakage current. The FET structure was fabricated on the wafer by using MIMOS's standard fabrication process. Aluminum (Al) was sputtered with thickness of 400 nm as metal shield layer at the source and drain area of FET structure. There are four different layout designs of source-drain metal shield that were tested by Keithley 236 current-voltage sourcing under light and dark conditions. The measurements were carried out in a dark box with controllable light intensity. Besides the drain leakage current investigation, this study also investigates the light effect of various layout designs with source-drain metal shield on FET structure. It was found that the layout design with source-drain metal shield has lower drain leakage current compared to the layout design without source-drain metal shield. However, the various layout design of source-drain metal shield cannot eliminate the light effect.