A built-in self-repair method for RAMs in mesh-based NoCs

Abstract

Network-on-chip is one popular interconnection infrastructure for giga-scale integrated chips. Moreover, the number of memory cores in such chips usually is very large. This paper proposes an efficient built-in self-repair (BISR) method for repairing memories in NoCs. By reusing the communication links in NoCs, the BISR scheme can repair multiple memories using one BISR circuit without incurring the problem of routing. To increase the repair efficiency, a global spare memory is designed for repairing multiple memories. Experimental results show that the proposed BISR scheme can achieve very high repair efficiency. Also, the area overhead of the BISR circuit is very low—only about 1.38% for fifteen 8K×64-bit memories.