A PCI-express Gen2 transceiver with adaptive 2-Tap DFE for up to 12-meter external cabling

T. Yeh, Wei-Yu Wang, Wen-Liang Wang, Yu-Hong Lin, Ying-Lien Cheng, Tsung-Hsin Chou, Jyhfong Lin
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引用次数: 2

Abstract

The most updated specification of PCI-Express External Cabling 1.0 only specifies Gen1 (2.5 Gbps) for short-reach usage. This proposed transceiver architecture not only increases the link rate from Genl to Gen2 (5 Gbps), but also extends link range from short-reach to long-reach using a 12-meter 26AWG cable. The S21 of such a cable is -20 dB at 2.5 GHz. The new receiver achieves jitter tolerance at the far-end terminal followed by such a cable is 0.76UI, with a random jitter of 0.31 UI, under the BER of 10-12. This design has been fabricated in TSMC 80 nm CMOS process, with the die area of 0.4 mm2 for each lane.
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PCI-express Gen2收发器,具有自适应2-Tap DFE,可用于长达12米的外部电缆
最新的PCI-Express外部布线1.0规范仅规定了Gen1 (2.5 Gbps)用于近距离使用。提出的收发器架构不仅提高了从gen1到Gen2的链路速率(5gbps),而且使用12米26AWG电缆将链路范围从短距离扩展到长距离。该电缆在2.5 GHz时的S21为- 20db。在BER为10-12的情况下,新型接收机在远端终端的抖动容限为0.76UI,随机抖动为0.31 UI。本设计采用台积电80nm CMOS工艺制造,每道芯片面积为0.4 mm2。
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