A Low-Resource Digital Implementation of the Fitzhugh-Nagumo Neuron

A. J. Leigh, Moslem Heidarpur, M. Mirhassani
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Abstract

Simulation is a particularly significant component of discovery and hypothesis evaluation in neuroscience. Given the typical complexity of the mathematical models involved in neuromorphic modelling, neuromorphic hardware for acceleration is an interesting topic of research. Thus, a novel, high-accuracy digital implementation of the Fitzhugh-Nagumo neuron is realized on FPGA. The proposed system offers substantial hardware resource savings and a higher clock frequency compared to previously proposed implementations. For these reasons, it is an excellent candidate for use in hardware acceleration of neuroscientific simulation. The implemented hardware achieves a normalized RMSE of 0.2451 at a maximum operation frequency of 367.78MHz.
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Fitzhugh-Nagumo神经元的低资源数字化实现
模拟是神经科学中发现和假设评估的一个特别重要的组成部分。考虑到神经形态建模中涉及的数学模型的典型复杂性,用于加速的神经形态硬件是一个有趣的研究课题。因此,在FPGA上实现了一种新颖的、高精度的Fitzhugh-Nagumo神经元的数字实现。与以前提出的实现相比,所提出的系统提供了大量的硬件资源节省和更高的时钟频率。由于这些原因,它是神经科学仿真硬件加速的一个很好的候选。所实现的硬件在最大工作频率367.78MHz下实现了0.2451的归一化RMSE。
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