Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816832
Alessandra Farina, Alessandro Nicolosi, E. Bonizzoni
This paper presents a new control method to regulate the output current of a resonant switched-capacitor converter (ReSCC). Starting from a fixed switching frequency operation, the phase-shift required to regulate the average output current is modulated through a fully-differential control scheme composed by a fully-differential OTA, a differential compensation network and two identical voltage-controlled delay lines. The proposed method eliminates any restriction on the minimum achievable phase-shift, is suitable for integration in a scaled technology and for high-frequency operation. Moreover, it allows a seamless control between output current sourcing and sinking capabilities, extending the load current range, and improving the response to load transients. A circuit design has been performed on a 110-nm BCD technology, with 3.7 V to 1.8 V voltage conversion, 60 mA of output current and 10 MHz operation. Simulations demonstrate the effectiveness of the proposed method.
{"title":"A Fully-Differential Delay-Line Based Control for Resonant Switched-Capacitor Converter","authors":"Alessandra Farina, Alessandro Nicolosi, E. Bonizzoni","doi":"10.1109/prime55000.2022.9816832","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816832","url":null,"abstract":"This paper presents a new control method to regulate the output current of a resonant switched-capacitor converter (ReSCC). Starting from a fixed switching frequency operation, the phase-shift required to regulate the average output current is modulated through a fully-differential control scheme composed by a fully-differential OTA, a differential compensation network and two identical voltage-controlled delay lines. The proposed method eliminates any restriction on the minimum achievable phase-shift, is suitable for integration in a scaled technology and for high-frequency operation. Moreover, it allows a seamless control between output current sourcing and sinking capabilities, extending the load current range, and improving the response to load transients. A circuit design has been performed on a 110-nm BCD technology, with 3.7 V to 1.8 V voltage conversion, 60 mA of output current and 10 MHz operation. Simulations demonstrate the effectiveness of the proposed method.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115169415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816836
Lara Novaresi, Marco Terenzi, P. Malcovati, A. Mazzanti, E. Bonizzoni
This paper presents a design solution for a PMUT RX front-end for high performance portable ultrasound medical imaging systems. The PMUT transducer is part of a ID array working in the 1-4 MHz frequency range. Adequate SNR and low power dissipation are ensured in the RX path thanks to a careful design flow focused onto specific imaging requirements, extracted considering the lumped-parameter equivalent circuit model of the transducer. Programmable gain [25dB-35dB] is implemented to comply with a wide range of input acoustic pressure while distortion parameters are designed in order to provide good imaging qualities. Transistor level design and simulations performed in a BCD-SOI 0.16-μm technology are shown as well.
{"title":"Acquisition RX Chain for PMUT-Based Highly Integrated Ultrasound Imaging Systems","authors":"Lara Novaresi, Marco Terenzi, P. Malcovati, A. Mazzanti, E. Bonizzoni","doi":"10.1109/prime55000.2022.9816836","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816836","url":null,"abstract":"This paper presents a design solution for a PMUT RX front-end for high performance portable ultrasound medical imaging systems. The PMUT transducer is part of a ID array working in the 1-4 MHz frequency range. Adequate SNR and low power dissipation are ensured in the RX path thanks to a careful design flow focused onto specific imaging requirements, extracted considering the lumped-parameter equivalent circuit model of the transducer. Programmable gain [25dB-35dB] is implemented to comply with a wide range of input acoustic pressure while distortion parameters are designed in order to provide good imaging qualities. Transistor level design and simulations performed in a BCD-SOI 0.16-μm technology are shown as well.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115461471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816790
F. Mitri, A. D. Iacovo, S. Santis, G. Sotgiu, L. Colace
With the threatening increase in explosive -based terrorism against civil populations, the development of new devices capable of a rapid and cost-effective detection of hidden explosives has become a worldwide priority. Recently, semiconductor quantum dots have demonstrated great potential as luminescent probes for trace explosive detection. However, the growing interest in this technology and its potentiality is not accompanied by its widespread use in practical applications and in operating environments since most of the proposed devices still consist of lab-based procedures not amenable for field operation. This work explores and compares two alternative ways of employing quantum dots as sensing material to build simple, compact, and reusable devices for vapor explosive detection, beyond their typical use as fluorescent probes in solution. First, a high-performance chemiresistive sensor whose electrical resistance changes proportionally to the target gas concentration is proposed. Then, we present an optical system based on the solid-state photoluminescence of quantum dots cast on a silicon substrate. Easy fabrication, portability, low-cost, high sensitivity, and reusability make both the reported devices quite promising not only for laboratory-scale testing but also for practical applications on the field.
{"title":"Quantum Dots for Explosive Detection in Air - Two Complimentary Approaches","authors":"F. Mitri, A. D. Iacovo, S. Santis, G. Sotgiu, L. Colace","doi":"10.1109/prime55000.2022.9816790","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816790","url":null,"abstract":"With the threatening increase in explosive -based terrorism against civil populations, the development of new devices capable of a rapid and cost-effective detection of hidden explosives has become a worldwide priority. Recently, semiconductor quantum dots have demonstrated great potential as luminescent probes for trace explosive detection. However, the growing interest in this technology and its potentiality is not accompanied by its widespread use in practical applications and in operating environments since most of the proposed devices still consist of lab-based procedures not amenable for field operation. This work explores and compares two alternative ways of employing quantum dots as sensing material to build simple, compact, and reusable devices for vapor explosive detection, beyond their typical use as fluorescent probes in solution. First, a high-performance chemiresistive sensor whose electrical resistance changes proportionally to the target gas concentration is proposed. Then, we present an optical system based on the solid-state photoluminescence of quantum dots cast on a silicon substrate. Easy fabrication, portability, low-cost, high sensitivity, and reusability make both the reported devices quite promising not only for laboratory-scale testing but also for practical applications on the field.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117115715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816771
Marcello Barbirotta, Abdallah Cheikh, A. Mastrandrea, F. Menichelli, M. Olivieri
Safety is one of the key rules for several application domains like automotive, avionics and the generally called Mission Critical applications. Over the past few years, a plethora of complex systems capable of executing smart applications were introduced in Edge Computing nodes, many of those require the availability of large amounts of data and computational resources, as some advanced AI edge devices rely on many integrated accelerated vector coprocessors that perform ML or DSP applications. On the other hand, safety being a key requirement mandates that the system be fault tolerant. In this paper, we present a comprehensive investigation about the integration of a configurable vector acceleration unit in a fault tolerant RISC-V soft core, introducing a redundant vector coprocessor suitable for all safety critical domains.
{"title":"Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration","authors":"Marcello Barbirotta, Abdallah Cheikh, A. Mastrandrea, F. Menichelli, M. Olivieri","doi":"10.1109/prime55000.2022.9816771","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816771","url":null,"abstract":"Safety is one of the key rules for several application domains like automotive, avionics and the generally called Mission Critical applications. Over the past few years, a plethora of complex systems capable of executing smart applications were introduced in Edge Computing nodes, many of those require the availability of large amounts of data and computational resources, as some advanced AI edge devices rely on many integrated accelerated vector coprocessors that perform ML or DSP applications. On the other hand, safety being a key requirement mandates that the system be fault tolerant. In this paper, we present a comprehensive investigation about the integration of a configurable vector acceleration unit in a fault tolerant RISC-V soft core, introducing a redundant vector coprocessor suitable for all safety critical domains.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123716748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816838
V. Grimaldi, F. Zanetto, F. Toso, Christian De Vita, G. Ferrari
Complex photonic architectures integrated into a single silicon chip require real-time control to keep each device at the desired working point. With this aim, non-invasive optical sensors are an effective solution, allowing to monitor the light inside optical waveguides without penalties in the photonic functionality. Here, the working principle of the CLIPP sensor and its electronic readout are presented and discussed in order to understand how to improve the performance and scale down the size. An improved version of the CLIPP is then presented, featuring a 10-fold improvement in the sensitivity and reaching unprecedented performance for transparent detectors, while also maintaining a small area occupation. Finally, a differential CLIPP readout scheme is discussed, which allows to mitigate the effect of common-mode disturbances.
{"title":"Non-invasive light sensor with enhanced sensitivity for photonic integrated circuits","authors":"V. Grimaldi, F. Zanetto, F. Toso, Christian De Vita, G. Ferrari","doi":"10.1109/prime55000.2022.9816838","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816838","url":null,"abstract":"Complex photonic architectures integrated into a single silicon chip require real-time control to keep each device at the desired working point. With this aim, non-invasive optical sensors are an effective solution, allowing to monitor the light inside optical waveguides without penalties in the photonic functionality. Here, the working principle of the CLIPP sensor and its electronic readout are presented and discussed in order to understand how to improve the performance and scale down the size. An improved version of the CLIPP is then presented, featuring a 10-fold improvement in the sensitivity and reaching unprecedented performance for transparent detectors, while also maintaining a small area occupation. Finally, a differential CLIPP readout scheme is discussed, which allows to mitigate the effect of common-mode disturbances.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125437089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816815
S. Mariappan, J. Rajendran, N. K. Aridas, A. Nathan, A. Grebennikov, B. Yarman
This paper presents a wideband CMOS power amplifier (PA) with Digitally-Reconfigurable-Impedance-Matching-Network (DRIMN), which is utilized to tune the impedance of the PA and also to optimize its performances across the frequency. The proposed DRIMN-PA is employed at the input, interstage, and output matching networks to establish a complete impedance tuning mechanism at all stages of the PA. The DRIMN mechanism comprises switching capacitors and inductors controlled via digital switching bits. The tuning property of the tunable inductor is executed via switching of multiple secondary windings employed between the turns of the inductor’s winding. The tunable inductor is designed area-efficiently in which the secondary windings do not consume a large area on-chip. The DRIMN-PA is fabricated in CMOS 130 nm process and has an operating bandwidth of 1.6 GHz from 1.1 to 2.7 GHz. It delivers a maximum output power of 27.5 to 28.5 dBm with a peak PAE of34 to 40% after tuning the RDIMN mechanism. The DRIMN-PA is also measured with a 20 MHz LTE modulated signal in which the attained linear output power and PAE are 23.3 to 24.8 dBm and 33 to 38%.
{"title":"A 1.1-to-2.7 GHz CMOS Power Amplifier with Digitally-Reconfigurable-Impedance Matching-Network (DRIMN) for Wideband Performance optimization","authors":"S. Mariappan, J. Rajendran, N. K. Aridas, A. Nathan, A. Grebennikov, B. Yarman","doi":"10.1109/prime55000.2022.9816815","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816815","url":null,"abstract":"This paper presents a wideband CMOS power amplifier (PA) with Digitally-Reconfigurable-Impedance-Matching-Network (DRIMN), which is utilized to tune the impedance of the PA and also to optimize its performances across the frequency. The proposed DRIMN-PA is employed at the input, interstage, and output matching networks to establish a complete impedance tuning mechanism at all stages of the PA. The DRIMN mechanism comprises switching capacitors and inductors controlled via digital switching bits. The tuning property of the tunable inductor is executed via switching of multiple secondary windings employed between the turns of the inductor’s winding. The tunable inductor is designed area-efficiently in which the secondary windings do not consume a large area on-chip. The DRIMN-PA is fabricated in CMOS 130 nm process and has an operating bandwidth of 1.6 GHz from 1.1 to 2.7 GHz. It delivers a maximum output power of 27.5 to 28.5 dBm with a peak PAE of34 to 40% after tuning the RDIMN mechanism. The DRIMN-PA is also measured with a 20 MHz LTE modulated signal in which the attained linear output power and PAE are 23.3 to 24.8 dBm and 33 to 38%.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125554577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816772
Yaohua Zhang, D. Jiang, A. Demosthenous
This paper presents a CMOS analog front-end for wearable A-mode ultrasound hand gesture recognition. This analog front-end is part of the research into using ultrasound to record and decode muscle signals with the aim of controlling a prosthetic hand as an alternative to surface electromyography. In this paper, the design of a pulser for driving piezoelectric transducers as well as a low-noise amplifier for the received echoes are presented. Simulation results show that the pulser circuit is capable of driving a 137 pF capacitive load with 30 V pulses at a frequency of 1 MHz and dissipates 142.1 mW power. The low-noise amplifier demonstrates a gain of 34 dB and an input-referred noise of 8.58 nV/$sqrt{}$Hz at 1 MHz.
{"title":"Design of a CMOS Analog Front-End for Wearable A-Mode Ultrasound Hand Gesture Recognition","authors":"Yaohua Zhang, D. Jiang, A. Demosthenous","doi":"10.1109/prime55000.2022.9816772","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816772","url":null,"abstract":"This paper presents a CMOS analog front-end for wearable A-mode ultrasound hand gesture recognition. This analog front-end is part of the research into using ultrasound to record and decode muscle signals with the aim of controlling a prosthetic hand as an alternative to surface electromyography. In this paper, the design of a pulser for driving piezoelectric transducers as well as a low-noise amplifier for the received echoes are presented. Simulation results show that the pulser circuit is capable of driving a 137 pF capacitive load with 30 V pulses at a frequency of 1 MHz and dissipates 142.1 mW power. The low-noise amplifier demonstrates a gain of 34 dB and an input-referred noise of 8.58 nV/$sqrt{}$Hz at 1 MHz.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116828093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816839
Eduardo Holguin, L. Trojman, L. Prócel, A. Brenes, A. Vladimirescu
This paper describes the design of a Vibrational Energy Harvester (VEH) based on a microelectromechanical system (MEMS) with gap-closing electrostatic resonator. The electrical signal generated by the MEMS is rectified with a charge pump circuit based on the Greinacher Voltage Doubler (GVD). The performance of the VEH system is analyzed and an optimal resistive load is calculated to maximize harvested power and frequency range of operation. The rectifier was designed in a 0. 18μm technology. The VEH system was validated with Cadence Virtuoso. The designed energy harvester generates a DC output power of 90. 06nW at 9. 95V under an applied vibration with an acceleration amplitude of $0.33mathrm{m}/mathrm{s}^{wedge}2$ at a frequency of 53Hz.
{"title":"Design and optimization of a Vibrational MEMS-Based Energy Harvester","authors":"Eduardo Holguin, L. Trojman, L. Prócel, A. Brenes, A. Vladimirescu","doi":"10.1109/prime55000.2022.9816839","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816839","url":null,"abstract":"This paper describes the design of a Vibrational Energy Harvester (VEH) based on a microelectromechanical system (MEMS) with gap-closing electrostatic resonator. The electrical signal generated by the MEMS is rectified with a charge pump circuit based on the Greinacher Voltage Doubler (GVD). The performance of the VEH system is analyzed and an optimal resistive load is calculated to maximize harvested power and frequency range of operation. The rectifier was designed in a 0. 18μm technology. The VEH system was validated with Cadence Virtuoso. The designed energy harvester generates a DC output power of 90. 06nW at 9. 95V under an applied vibration with an acceleration amplitude of $0.33mathrm{m}/mathrm{s}^{wedge}2$ at a frequency of 53Hz.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128264401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816761
M. Leoncini, Paolo Melillo, A. Bertolini, S. Levantino, M. Ghioni
The open-loop transfer function provides valuable insights into the key dynamic characteristics of DC/DC voltage regulators, such as stability, line and load transient response. Nonetheless, the experimental measurement of the loop gain in a monolithically integrated regulator is not straightforward or not even possible by using standard techniques, especially when complex control strategies are adopted. To overcome this issue, we propose an integrated loop-gain measurement circuit specifically designed for DC/DC converters with time-based control. The measurement circuit includes a transconductor, two delay lines, and a simple logic that can be easily integrated in a small silicon area. Moreover, the circuit can be easily disabled during normal operation to minimize its impact on the regulator performance. The proposed circuit was fabricated in a 180nm CMOS technology, occupying a silicon area of $0.027mathrm{mm}^{2}$. Experimental validation was performed by embedding the circuit into a boost converter with time-based control.
{"title":"Integrated Loop-Gain Measurement Circuit for DC/DC Boost Converters with Time-Based Control","authors":"M. Leoncini, Paolo Melillo, A. Bertolini, S. Levantino, M. Ghioni","doi":"10.1109/prime55000.2022.9816761","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816761","url":null,"abstract":"The open-loop transfer function provides valuable insights into the key dynamic characteristics of DC/DC voltage regulators, such as stability, line and load transient response. Nonetheless, the experimental measurement of the loop gain in a monolithically integrated regulator is not straightforward or not even possible by using standard techniques, especially when complex control strategies are adopted. To overcome this issue, we propose an integrated loop-gain measurement circuit specifically designed for DC/DC converters with time-based control. The measurement circuit includes a transconductor, two delay lines, and a simple logic that can be easily integrated in a small silicon area. Moreover, the circuit can be easily disabled during normal operation to minimize its impact on the regulator performance. The proposed circuit was fabricated in a 180nm CMOS technology, occupying a silicon area of $0.027mathrm{mm}^{2}$. Experimental validation was performed by embedding the circuit into a boost converter with time-based control.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121698414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816755
Alessandro Dago, M. Leoncini, A. Cattani, S. Levantino, M. Ghioni
This paper presents a novel auto-zeroing common-gate comparator. This topology cancels the input-referred offset voltage by AC coupling the gates of the two input mosfets. The circuit operation is divided in two phases: in the first one, the circuit is in closed loop and samples the offset voltage as a voltage difference between two capacitors, while, in the second phase, the circuit is configured in open loop to compare the two input signals. Monte Carlo simulations run on a reference design in CMOS process shows that the offset standard deviation is reduced from 4. 42mV down to 25.85$mu$V. The designed comparator shows a 290$mu$W power consumption from a 5V supply, while occupying a total area of 0.0156m$text{m}^{2}$.
{"title":"A Novel Common-Gate Comparator with Auto-Zeroing Offset Cancellation","authors":"Alessandro Dago, M. Leoncini, A. Cattani, S. Levantino, M. Ghioni","doi":"10.1109/prime55000.2022.9816755","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816755","url":null,"abstract":"This paper presents a novel auto-zeroing common-gate comparator. This topology cancels the input-referred offset voltage by AC coupling the gates of the two input mosfets. The circuit operation is divided in two phases: in the first one, the circuit is in closed loop and samples the offset voltage as a voltage difference between two capacitors, while, in the second phase, the circuit is configured in open loop to compare the two input signals. Monte Carlo simulations run on a reference design in CMOS process shows that the offset standard deviation is reduced from 4. 42mV down to 25.85$mu$V. The designed comparator shows a 290$mu$W power consumption from a 5V supply, while occupying a total area of 0.0156m$text{m}^{2}$.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127777119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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