Hoyoung Chang, Soojin Kim, Seonyoung Lee, Kyeongsoon Cho
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引用次数: 3
Abstract
We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variable block sizes and generates 41 motion vectors. The implemented IP based on the proposed algorithm and architecture processes 60 image frames per second for 1080HD video at the operating frequency of 45.5MHz.
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