Bistable serially connected reverse-biased PIN diodes

Abstract

In Silicon photonics, there is an ever-growing need for optical switches capable of high-speed operation, needed for applications such as optical computing, microwave photonics, and LiDAR. One potential candidate for a highspeed optical switch consists of two PIN junctions connected in series, reverse-biased. When one PIN junction is fed with an oscillating optical input at some frequency and the other with a constant threshold input, the output displays bistable hysteresis, ideal for an optical binary switch. In this research, PSpice and MATLAB are used to develop mathematical models of the circuit and simulate the operation of the Symmetric PIN, or S-PIN switch at various frequencies. While the work done so far has been highly theoretical, measurements have been carried out on an optoelectronic prototype of the S-PIN in order to observe the basic operation of the device. Additionally, a model of the S-PIN developed in MATLAB agrees closely with simulations of the switch in PSpice. In the physical circuit, the presence of parasitic capacitance and inductance in the PIN junctions cause the shape of the output hysteresis to deteriorate as the running frequency is increased. Simulations show that if parasitic capacitance is minimized, the switch can operate in the GHz range. One method explored to mitigate this capacitance is impedance matching, which has shown to improve output bistability to some extent. Results from modeling indicate that the use of components with low capacitance has the most potential to allow the S-PIN to operate at higher frequencies competitive with modern electronic switches.