B. Zehner, H. Mattausch, R. Tielert, H.-J. Graller
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引用次数: 6
Abstract
Two-dimensional filtering, achieved by the design of a 22MHz IC, incorporating a resettable FIFO memory as a flexible delay unit, will be reported. The chip was implemented with 80K transistors in 2μm double-well CMOS.
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