Stacked switched capacitor architecture using electrolytic capacitors for size reduction

Abstract

DC-Link Capacitors are one of the core constituents in many power electronic systems mainly DC-micro grids. They contribute significantly to the overall size. In this paper, a technique “Stacked Switched Capacitor” (SSC) proposed earlier is modified by using an array of electrolytic capacitors and switches as an alternative to a large electrolytic capacitor. The new topology is named “electrolytic SSC” (eSSC) and it effectively reduces the size of the converter. This technique replaces a large electrolytic capacitor with smaller capacitors and an array of switches to mimic the behavior of a large electrolytic capacitor. In this paper, the proposed topology is analyzed and different design requirements are taken into account for the proper functioning of the eSSC. The simulation results are presented and an estimate of the relative volume of the original SSC shows that the proposed eSSC indeed reduces the size by a reasonable amount and it can be inculcated into any system where capacitor bank is required which draws current at line frequency.