Integrator clamping for asynchronous sigma-delta modulator central frequency increment

Abstract

Hysteretic comparator (Schmitt trigger) is the basic part of the asynchronous sigma-delta modulator (ASDM). If propagation delay of a hysteretic comparator is not equal to zero and it has measurable value, than it affects the ASDM output frequency spectrum. As ASDM is a circuit with serial connection of an integrator and a hysteretic comparator followed by a negative feedback loop, propagation delay of the comparator will introduce the timing errors in ASDM output signal-triggering events. Therefore ASDM central frequency will be lower then it is in the case for propagation delay equal to zero. This study provides mathematical analysis of the hysteretic comparator propagation delay influence to the ASDM output frequency spectrum. The method for ASDM central frequency improvement using integrator voltage clamping has been proposed. Mathematical analysis, together with simulation and measurement results, shows partial central frequency increment. As ASDM circuit can be used as an oscillator for zero-input signals, central frequency improvement can be significant.