High-speed logic circuit considerations

Abstract

This discussion is confined to circuits operating at switching speeds sufficiently fast to require the use of terminated transmission lines for all logic interconnections other than to an adjacent device. The discussion is further confined to significant factors affecting circuit decisions in a high volume commercial/industrial environment. Laboratory curiosities operating at absolute maximum speeds are not considered in view of the extremely distorted economics associated with experimental technologies. The factors under discussion are technology considerations, economic considerations, logic arrays, power dissipation, and packaging media constraints. The discussion is not intended to be a gross prediction of future practice, but rather a snapshot of today's design considerations imposed by present technology and Mother Nature's rather rigid philosophy concerning the speed of light. Since the transmission time through the interconnecting media is significant when compared to propagation delay time of the logic device, the physical size of the system has some bearing on the definition of high speed. This discussion is concerned with relatively large organizations such that a propagation delay time of 2 to 5 nanoseconds may be considered high speed. More dramatic speed improvements may come with machine organizations which consume large amounts of circuits. These organizations are now becoming feasible due to increased reliability and the availability of low cost devices through the semiconductor industry.