An EFSM-driven and model checking-based approach to functional test generation for hardware designs

Abstract

This paper describes a model-based functional test generation method for hardware designs. The main principles are as follows. Two models are extracted from an HDL description: a functional model, which represents the design under scrutiny, and a coverage model, which represents a set of testing goals. Each goal is specified in the negative form to force a model checker to find a counterexample - an execution of the functional model that violates the given property, and thus reaches the testing goal. The coverage criterion is defined on top of extended finite state machines derived from a design's source code. Experiments have shown the method flexibility and effectiveness.