{"title":"High-Performance CMOS Tunable Differential Active Inductor for RF applications","authors":"Sehmi Saad, F. Haddad, Aymen Ben Hammadi","doi":"10.1109/DTS55284.2022.9809852","DOIUrl":null,"url":null,"abstract":"Design of a CMOS compact tunable differential active inductor (DAI) suitable to low-cost and multi-standard systems is presented. The structure uses only active components, based on the Gyrator-C topology approach with two cross-coupled pairs and an additive feedback resistance to enhance the quality factor (Q). The proposed DAI, implemented in 130 nm CMOS process, achieves a Self-Resonance Frequency (SRF) from few Megahertz to 3.3 GHz. As well, it demonstrates a Q ≈ 388 at 2.31GHz, while the achieved inductance tuning range varies from 33 nH to 98 nH. The circuit consumes 7.28 mW from 1.2 V supply and occupies a small area of only (19×45) um2, Noise, linearity and sensitivity of the proposed DAI to process and mismatch variations are also studied in the paper.","PeriodicalId":290904,"journal":{"name":"2022 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTS55284.2022.9809852","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Design of a CMOS compact tunable differential active inductor (DAI) suitable to low-cost and multi-standard systems is presented. The structure uses only active components, based on the Gyrator-C topology approach with two cross-coupled pairs and an additive feedback resistance to enhance the quality factor (Q). The proposed DAI, implemented in 130 nm CMOS process, achieves a Self-Resonance Frequency (SRF) from few Megahertz to 3.3 GHz. As well, it demonstrates a Q ≈ 388 at 2.31GHz, while the achieved inductance tuning range varies from 33 nH to 98 nH. The circuit consumes 7.28 mW from 1.2 V supply and occupies a small area of only (19×45) um2, Noise, linearity and sensitivity of the proposed DAI to process and mismatch variations are also studied in the paper.