Standard testability bus-an applications example

J. Turino
{"title":"Standard testability bus-an applications example","authors":"J. Turino","doi":"10.1109/IMTC.1990.65961","DOIUrl":null,"url":null,"abstract":"An application of a standard testability bus to the design of a next-generation automatic test system is described. The target system that must be made testable consists of multiple printed circuit boards that can be functionally reconfigured at start-up time via downloading of specific operating parameters to the on-board RAM. The result of the application was the ability to meet the system-level testability specifications, while at the same time reducing the time and cost associated with design verification, logic and fault simulation, capital equipment cost for external ATE (automatic test equipment), and on-going factory and field testing and troubleshooting.<<ETX>>","PeriodicalId":404761,"journal":{"name":"7th IEEE Conference on Instrumentation and Measurement Technology","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th IEEE Conference on Instrumentation and Measurement Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.1990.65961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

An application of a standard testability bus to the design of a next-generation automatic test system is described. The target system that must be made testable consists of multiple printed circuit boards that can be functionally reconfigured at start-up time via downloading of specific operating parameters to the on-board RAM. The result of the application was the ability to meet the system-level testability specifications, while at the same time reducing the time and cost associated with design verification, logic and fault simulation, capital equipment cost for external ATE (automatic test equipment), and on-going factory and field testing and troubleshooting.<>
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
标准可测试性总线—一个应用程序示例
介绍了标准测试总线在下一代自动测试系统设计中的应用。目标系统必须是可测试的,它由多个印刷电路板组成,这些电路板可以在启动时通过下载特定的操作参数到板上RAM来重新配置功能。应用的结果是能够满足系统级可测试性规范,同时减少了与设计验证、逻辑和故障模拟相关的时间和成本,外部ATE(自动测试设备)的资本设备成本,以及正在进行的工厂和现场测试和故障排除
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Theoretical aspects of calibration procedures in network analyzers for nonlinear one port devices The digital measurement of low values of angular velocity and acceleration MMIC related metrology at the National Institute of Standards and Technology Parameter estimation in strongly nonlinear circuits Second order discriminant function for amplitude comparison monopulse
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1