A 4-bit 1.356 Gsps ADC for DS-CDMA UWB System

Ja-Hyun Koo, Yun-Jeong Kim, Bong-Hyuck Park, Sang-Seong Choi, Shin-Il Lim, Suki Kim
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引用次数: 12

Abstract

In this paper, a 4-bit 1.356GS/S analog to digital (A/D) converter targeted for the direct spectrum code division multiple access ultra wide band (DS-CDMA UWB) is presented. The A/D converter uses a fully differential flash architecture. To achieve low power consumption and high conversion rate, the proposed converter is designed with current mode amplifier (CMA) and each preamplifier includes a dual sense amplifier (DSA). The A/D converter can sample input frequencies above 650 MHz with this current mode processing technique. The A/D converter achieves 3.7 effective number of bits (ENOBs) for a 30MHz sinusoidal input and 3.35 ENOBs for a 650 MHz input at a 1.356 GHz sampling rate. At 1.356 GS/s, the current consumption is 38 mA including digital logic with a power supply of 1.8V. The proposed A/D converter is fabricated using a 0.18-mum 6Metal lPoly CMOS process and the active area is 0.35 mm2.
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一种用于DS-CDMA超宽带系统的4位1.356 Gsps ADC
提出了一种针对直接频谱码分多址超宽带(DS-CDMA UWB)的4位1.356GS/S模数转换器。A/D转换器采用全差分闪存架构。为了实现低功耗和高转换率,该变换器设计了电流模式放大器(CMA),每个前置放大器包括一个双感放大器(DSA)。采用这种电流模式处理技术,A/D转换器可以对650 MHz以上的输入频率进行采样。在1.356 GHz采样率下,A/D转换器在30MHz正弦输入下可实现3.7有效位数(ENOBs),在650 MHz输入下可实现3.35有效位数(ENOBs)。在1.356 GS/s时,电流消耗为38 mA,包括1.8V电源的数字逻辑。所提出的A/D转换器采用0.18 μ m的6金属聚CMOS工艺制造,有源面积为0.35 mm2。
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