{"title":"Ultracompact Inverted Input Delay Doherty Power Amplifier with a Novel Power Divider for 5G mm-Wave","authors":"Aniello Franzese, M. Wei, R. Negra, A. Malignaggi","doi":"10.1109/mms55062.2022.9825609","DOIUrl":null,"url":null,"abstract":"This paper reports on the design of a Doherty power amplifier (DPA) for 5G mm-wave applications. Conversely to standard DPAs, this design presents a delay at the input of the carrier amplifier, which enhances the isolation of the peaking amplifier while the DPA is in its low power regime. Moreover, the circuit leverages a novel power divider (PD) to reduce both size and number of passive components. Moreover, the PD transforms the input impedance of the carrier and the peaking amplifiers to 50 Ω avoiding lossy matching networks. Performance consists of a peak gain without pre-driver amplifiers of more than 7 dB at 26.5 GHz, a back-off efficiency plateau of 5 dB, and a saturation power of more than 14 dBm. The circuit has been fabricated in the IHP 130-nm SiGe technology and occupies an effective area of 660×360 µm2, which makes it suitable to be integrated into a beamformer chip.","PeriodicalId":124088,"journal":{"name":"2022 Microwave Mediterranean Symposium (MMS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Microwave Mediterranean Symposium (MMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/mms55062.2022.9825609","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper reports on the design of a Doherty power amplifier (DPA) for 5G mm-wave applications. Conversely to standard DPAs, this design presents a delay at the input of the carrier amplifier, which enhances the isolation of the peaking amplifier while the DPA is in its low power regime. Moreover, the circuit leverages a novel power divider (PD) to reduce both size and number of passive components. Moreover, the PD transforms the input impedance of the carrier and the peaking amplifiers to 50 Ω avoiding lossy matching networks. Performance consists of a peak gain without pre-driver amplifiers of more than 7 dB at 26.5 GHz, a back-off efficiency plateau of 5 dB, and a saturation power of more than 14 dBm. The circuit has been fabricated in the IHP 130-nm SiGe technology and occupies an effective area of 660×360 µm2, which makes it suitable to be integrated into a beamformer chip.