Single shot transient suppressor (SSTS) for high current high slew rate microprocessor

L. Amoroso, M. Donati, X. Zhou, F. Lee
{"title":"Single shot transient suppressor (SSTS) for high current high slew rate microprocessor","authors":"L. Amoroso, M. Donati, X. Zhou, F. Lee","doi":"10.1109/APEC.1999.749649","DOIUrl":null,"url":null,"abstract":"Future generation microprocessors are predicted to exhibit heavier loads and faster transients. Conventional voltage regulator modules (VRM) need a large amount of output filter capacitors to meet future requirements and a huge number of decoupling capacitors, mainly due to the presence of parasitic inductance between the VRM and the microprocessor. In this paper, a new active damp concept is presented. By charging some auxiliary capacitors at higher voltage, it is possible to store the amount of charge required by the processor during the step up transient; this extra charge can be locally delivered to the processor in a single shot manner, bypassing the slower VRM. In the same way, this circuit can sink the excess of charge that has to be removed during the step down transient. By using this transient suppressor circuit, a conventional VRM can still provide adequate steady state regulation, while the size of decoupling and filter capacitors can be significantly reduced. Experimental results prove the validity of the concept.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"74","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.1999.749649","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 74

Abstract

Future generation microprocessors are predicted to exhibit heavier loads and faster transients. Conventional voltage regulator modules (VRM) need a large amount of output filter capacitors to meet future requirements and a huge number of decoupling capacitors, mainly due to the presence of parasitic inductance between the VRM and the microprocessor. In this paper, a new active damp concept is presented. By charging some auxiliary capacitors at higher voltage, it is possible to store the amount of charge required by the processor during the step up transient; this extra charge can be locally delivered to the processor in a single shot manner, bypassing the slower VRM. In the same way, this circuit can sink the excess of charge that has to be removed during the step down transient. By using this transient suppressor circuit, a conventional VRM can still provide adequate steady state regulation, while the size of decoupling and filter capacitors can be significantly reduced. Experimental results prove the validity of the concept.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
用于大电流、高转换率微处理器的单镜头瞬态抑制器
下一代微处理器预计将表现出更重的负载和更快的瞬态。传统的稳压模块(VRM)需要大量的输出滤波电容来满足未来的需求,并需要大量的去耦电容,这主要是由于VRM与微处理器之间存在寄生电感。本文提出了一种新的主动阻尼概念。通过在更高的电压下对一些辅助电容器充电,可以在升压瞬态期间存储处理器所需的电量;这些额外的费用可以在本地以单一的方式传递给处理器,绕过较慢的VRM。以同样的方式,该电路可以吸收在降压瞬态期间必须去除的多余电荷。通过使用这种暂态抑制电路,传统的VRM仍然可以提供足够的稳态调节,同时去耦和滤波电容器的尺寸可以显着减小。实验结果证明了该概念的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A zero voltage switching and self-reset forward converter topology A method of speed sensorless control of direct-field-oriented induction motor operating at high efficiency with core loss consideration Robust flux weakening scheme for surface-mounted permanent-magnet synchronous drives employing an adaptive lattice-structure filter A new control method for single-phase active power line conditioners A comprehensive study of neutral-point voltage balancing problem in three-level neutral-point-clamped voltage source PWM inverters
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1