Signed-digit CMOS (SD-CMOS) logic circuits with dynamic operation

Abstract

This paper proposes a design for signed-digit CMOS (SD-CMOS) basic circuits, such as a driver circuit, an inverter circuit, and a full-adder circuit, and describes a parallel multiplier circuit capable of high-speed operation with a time of about 10 nsec independent of the bit length. The proposed CMOS basic circuits utilize a multi-voltage power supply to enable dynamic operation with pre-charged output terminals at signal level 0 (VDD1). This design methodology is applicable to arithmetic circuits for highly accurate, high-speed processors.