The Effect of Surface Optimization on Post-grinding Yield of 200 mm Wafer Level Packaging Applications

Abstract

In this paper, a yield increase on post-grinding of 200 mm wafer level packaging applications is presented. 200 mm wafer level plasma enhanced oxide-oxide direct bonding and wafer grinding are used in the packaging of the wafers. Since the surface conditions of the wafers that are used in the packaging is the most critical point of the wafer bonding and grinding processes, it is focussed to optimizing wafer surfaces to increase the yield. After the optimizations on the surface conditions of the BiCMOS wafer used in the packaging, the 200 mm plasma enhanced wafer to wafer direct bonding yield increases from 0% to 99% and at the same time the post-grinding yield of these wafers increases from 0% to over 90%.