FPGA implementation of CDMA trans-receiver

S. A. Joshi, Praveen B. Sarangamath, Mohammed Irfan Faras, Vishwanath Lakkannavar
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引用次数: 2

Abstract

Code division multiple access (CDMA) systems are being counted to provide the necessary infrastructure to implement future 3G systems. The CDMA is uniquely featured by its spread spectrum (a random) process employing a pseudo random noise (PN) sequence, thus it is called the spread spectrum multiple access (SSMA). The CDMA can eliminate the data transfer latency variations by sharing the data communication media among multiple users concurrently. In this proposed work, we simulate the functionality of CDMA system on Xilinx ISE platform. Here, we use Manchester encode/decode technique for encryption and decryption. The simulation results show the working of CDMA transmitter and receiver on Verilog platform. Implementation of proposed system is targeted on Virtex 5 FPGA.
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CDMA收发器的FPGA实现
码分多址(CDMA)系统正在为实施未来的3G系统提供必要的基础设施。CDMA的独特之处在于其扩频(随机)过程采用伪随机噪声(PN)序列,因此被称为扩频多址(SSMA)。CDMA通过在多个用户之间同时共享数据通信介质,消除了数据传输延迟的变化。在本文中,我们在赛灵思ISE平台上模拟了CDMA系统的功能。在这里,我们使用曼彻斯特编码/解码技术进行加密和解密。仿真结果表明,CDMA发射机和接收机在Verilog平台上工作正常。该系统是在Virtex 5 FPGA上实现的。
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