A Single Chip Motion JPEG Codec LSI

Okada, Matsuda, Watanabe, Kondo
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引用次数: 15

Abstract

We have developed a single chip motion JPEG codec LSI that can compress and decompress VGA-size (640 pixels/spl times/480 lines) JPEG images at the rate of 30 frames per second simply by connecting a single external buffer memory chip. The LSI can control compression ratio control technique to store a fixed number of images when there is limited memory capacity, and it compresses data stored in the frame buffer to enable high-speed signal processing without the use of high-speed image memory. The JPEG codec core is small (40000 gates) and power consumption is low (220 mW), making it well suited to a wide range of image processing applications in consumer products.
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单片运动JPEG编解码器LSI
我们已经开发了一种单芯片运动JPEG编解码器LSI,它可以压缩和解压vga大小(640像素/spl次/480行)的JPEG图像以每秒30帧的速率,只需连接一个外部缓冲存储器芯片。LSI可以控制压缩比控制技术,在内存容量有限的情况下存储固定数量的图像,并且可以压缩存储在帧缓冲区中的数据,从而实现高速信号处理,而无需使用高速图像存储器。JPEG编解码器核心很小(40000门),功耗低(220兆瓦),使其非常适合消费类产品中的广泛图像处理应用。
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