{"title":"A Very High Speed, High Resolution Dynamic Current Comparator","authors":"Abdel Rahman M. Dawood, F. Farag","doi":"10.1109/JAC-ECC54461.2021.9691448","DOIUrl":null,"url":null,"abstract":"Using 180 nm CMOS technology, this research is suggested a new idea for designing a low voltage dynamic current comparator. The proposed circuit utilizes a standard CMOS inverter. As a result, the proposed circuit is better suited to high-speed and low-power Analog to Digital Converter (ADC) applications. In metastable mode, the input and output of the CMOS inverter are shorted, and then comparison mode is used to determine the ultimate choice based on the input current. The new comparator with positive feedback has the best low-voltage behavior, allowing for a short delay time while reducing offset current and power waste. The suggested circuit has a frequency of 1GHz and a precision of 1 pA.","PeriodicalId":354908,"journal":{"name":"2021 9th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 9th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/JAC-ECC54461.2021.9691448","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Using 180 nm CMOS technology, this research is suggested a new idea for designing a low voltage dynamic current comparator. The proposed circuit utilizes a standard CMOS inverter. As a result, the proposed circuit is better suited to high-speed and low-power Analog to Digital Converter (ADC) applications. In metastable mode, the input and output of the CMOS inverter are shorted, and then comparison mode is used to determine the ultimate choice based on the input current. The new comparator with positive feedback has the best low-voltage behavior, allowing for a short delay time while reducing offset current and power waste. The suggested circuit has a frequency of 1GHz and a precision of 1 pA.
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