{"title":"Low voltage and low power aspects of data converter design","authors":"Qiuting Huang","doi":"10.1109/ESSDER.2004.1356478","DOIUrl":null,"url":null,"abstract":"Low voltage design is becoming an important issue for analogue circuits expected to operate around 1 V supply in sub 100 nm CMOS technologies. This contribution discusses the impact of low voltage on circuit architecture, opamp configuration to maintain speed and DC gain, common-mode feedback and its stability, switching speed, as well as trends in achievable signal to noise ratio and speed for a given power consumption.","PeriodicalId":287103,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDER.2004.1356478","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
Low voltage design is becoming an important issue for analogue circuits expected to operate around 1 V supply in sub 100 nm CMOS technologies. This contribution discusses the impact of low voltage on circuit architecture, opamp configuration to maintain speed and DC gain, common-mode feedback and its stability, switching speed, as well as trends in achievable signal to noise ratio and speed for a given power consumption.