{"title":"An Extremely Low-Power Bipolar Current-Mode I/O Circuit for Multi-Gbit/s Interfaces","authors":"T. Kawamura, M. Suzuki, H. Ichino","doi":"10.1109/VLSIC.1994.586197","DOIUrl":null,"url":null,"abstract":"An extremely low-power bipolar current-mode 1/0 circuit is proposed. This 1/0 circuit can achieve a 2.5 Gbit/s transmission with a 50 R impedance matching at both terminals and with a power dissipation one fifth that of an ECL I/O.","PeriodicalId":350730,"journal":{"name":"Proceedings of 1994 IEEE Symposium on VLSI Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1994.586197","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
An extremely low-power bipolar current-mode 1/0 circuit is proposed. This 1/0 circuit can achieve a 2.5 Gbit/s transmission with a 50 R impedance matching at both terminals and with a power dissipation one fifth that of an ECL I/O.
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