Y. Sugawara, M. Asano, R. Singh, J. Palmour, D. Takayama
{"title":"4.5 kV novel high voltage high performance SiC-FET \"SIAFET\"","authors":"Y. Sugawara, M. Asano, R. Singh, J. Palmour, D. Takayama","doi":"10.1109/ISPSD.2000.856783","DOIUrl":null,"url":null,"abstract":"A novel high voltage SiC MOS device named SIAFET (Static induction Injected Accumulated FET) is proposed, which has no pn junction in its on-current flow path and has a conductivity modulation by carriers injected from a p+ buried gate. SIAFET with blocking voltage (BV) of 5500 V and specific on-resistance RonS (without the conductivity modulation) of 57 m/spl Omega/cm/sup 2/ was designed by using the 6200 V mesa JTE and was fabricated using 4H-SiC substrates. Its basic operation has been confirmed for the first time and it has been demonstrated that its RonS has been shown to reduce to less than 1/6 by SIAFET action. Although its achieved BV is relatively low (2030 V and 4580 V) and its RonS is relatively high (172 m/spl Omega/cm/sup 2/ and 387 m/spl Omega/cm/sup 2/), RonS of 4580 V SiC-SIAFET is less than 1/25 that of the theoretical RonS limit of Si-MOSFET for this BV.","PeriodicalId":260241,"journal":{"name":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","volume":"140 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2000.856783","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25
Abstract
A novel high voltage SiC MOS device named SIAFET (Static induction Injected Accumulated FET) is proposed, which has no pn junction in its on-current flow path and has a conductivity modulation by carriers injected from a p+ buried gate. SIAFET with blocking voltage (BV) of 5500 V and specific on-resistance RonS (without the conductivity modulation) of 57 m/spl Omega/cm/sup 2/ was designed by using the 6200 V mesa JTE and was fabricated using 4H-SiC substrates. Its basic operation has been confirmed for the first time and it has been demonstrated that its RonS has been shown to reduce to less than 1/6 by SIAFET action. Although its achieved BV is relatively low (2030 V and 4580 V) and its RonS is relatively high (172 m/spl Omega/cm/sup 2/ and 387 m/spl Omega/cm/sup 2/), RonS of 4580 V SiC-SIAFET is less than 1/25 that of the theoretical RonS limit of Si-MOSFET for this BV.