Seung-Min Lee, Jin-H. Chung, Hyung-Seok Yoon, M.M.-O. Lee
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引用次数: 0
Abstract
In this paper a study has been presented on high speed (HS) and 79 mW low power (LP) 16/spl times/16 MAC performance of XOR-based circuits using transmission gate logic (TG) implemented on 0.6 um CMOS DLP/DLM technology. It is shown that our proposed MAC results in better performance than other published MACs due to no DC leakage currents for low power and bypassing unnecessary switching activities with latches before and after the multiplier for high speed.
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