A High Performance Computing Architecture for Real-Time Digital Emulation of RF Interactions

Mandovi Mukherjee, N. M. Rahman, Coleman DeLude, J. Driscoll, Uday Kamal, J. Woo, Jamin Seo, Sudarshan Sharma, Xiangyu Mao, Payman Behnam, Sharjeel Khan, D. Kim, Jianming Tong, Prachi Sinha, S. Pande, T. Krishna, J. Romberg, Madhavan Swaminathan, S. Mukhopadhyay
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Abstract

A high performance architecture for emulating realtime radio frequency systems is presented. The architecture is developed based on a novel compute model and uses nearmemory techniques coupled with highly distributed autonomous control to simultaneously optimize throughput and minimize latency. A cycle level C++ based simulator is used to validate the proposed architecture with simulation of complex RF scenarios.
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一种用于射频交互实时数字仿真的高性能计算架构
提出了一种用于实时射频系统仿真的高性能体系结构。该架构基于一种新颖的计算模型,并使用近内存技术和高度分布式的自主控制来同时优化吞吐量和最小化延迟。一个基于c++的周期级模拟器通过对复杂射频场景的仿真来验证所提出的体系结构。
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