Design and Implementation for Near-optimal Noncoherent Sequence Detection of CPM

Penghui Lai, Shilian Wang, Cong Peng, Yanmin Ma, K. Gao, Chun Yang
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Abstract

Continuous phase modulation (CPM) has been widely used in telecommunication and aeronautical telemetry system due to its high power and spectral efficiency. Non-coherent detection is a kind of feasible CPM detection method if there is large phase noise or residual carrier frequency offset. Near-optimal non-coherent sequence detection, which is based on Viterbi algorithm, has a performance close to that of maximum-likelihood sequence detection (MLSD). However, near-optimal non-coherent detection of CPM is very complicated to be implemented, and it is even more difficult to achieve a high speed due to feedback in the process of calculating branch metrics, add-compare-select (ACS), updating the beginning phase and phase reference symbol. In this paper, we first review near-optimal non-coherent detection of CPM, and then we present a high speed design of FPGA implementation for near-optimal non-coherent detection of a 64 state, 4-ary, length-3T raised cosine (3RC) CPM on Xilinx XC7VX690T device. In our scheme, the frequency pulse truncation is used to simplify the CPM detection. We propose a feedback processing in parallel for different states of CPM trellis to achieve a low latency. Furthermore, we develop a recursive implementation architecture for the process of updating the beginning phase. We achieve the CPM bit rate of 25Mbps for the on-chip processing clock of 100MHz. The results of simulation shows near-optimal non-coherent detection performs much better the coherent detection when residual carrier frequency offset or phase noise exists. It is found that the implementation can achieve a degradation in the Eb/N0 from computer simulation of as small as 0.3 dB for an average BER=10-5.
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近似最优非相干序列检测的设计与实现
连续相位调制(CPM)由于具有较高的功率和频谱效率,在通信和航空遥测系统中得到了广泛的应用。在存在较大相位噪声或载波频偏的情况下,非相干检测是一种可行的CPM检测方法。基于Viterbi算法的近最优非相干序列检测性能接近最大似然序列检测(MLSD)。然而,CPM的近最优非相干检测的实现非常复杂,并且由于在计算支路度量、添加比较选择(ACS)、更新起始相位和相位参考符号等过程中存在反馈,难以实现高速检测。在本文中,我们首先回顾了CPM的近最优非相干检测,然后在Xilinx XC7VX690T器件上给出了64态、4位、长度为3t的提高余弦(3RC) CPM的高速FPGA实现。在我们的方案中,使用频率脉冲截断来简化CPM检测。我们提出了一种针对不同状态的CPM网格的并行反馈处理,以实现低延迟。此外,我们为更新开始阶段的过程开发了一个递归实现体系结构。我们在片上处理时钟为100MHz时实现了25Mbps的CPM比特率。仿真结果表明,当载波频偏或相位噪声存在时,近最优非相干检测比相干检测效果好得多。结果表明,在平均误码率为10-5的情况下,通过计算机模拟,该方法可以实现小至0.3 dB的Eb/N0衰减。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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