A 70-GHz Effective Sampling Rate On-Chip Oscilloscope with Time-Domain Digitization

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI:10.1109/CICC.2006.320964

M. Safi-Harb, G. Roberts

引用次数: 1

Abstract

An on-chip digitizer for the transient measurement of digital signal integrity is proposed. Undersampling, combined with single-path time-domain processing is used to perform the embedded measurement in a time-efficient manner. On-chip interconnect crosstalk generation with variable strength is included on chip for characterization, and successfully measured using a prototype chip, implemented in a 0.18 mum CMOS process. The proposed system is easily calibratable, with an estimated static power dissipation of ~3.5 mW. The total active area taken up by the associated test and calibration vehicles is 0.45 mm2

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70 ghz有效采样率时域数字化片上示波器

提出了一种用于数字信号完整性瞬态测量的片上数字化仪。欠采样与单路径时域处理相结合，以时间效率的方式进行嵌入式测量。具有可变强度的片上互连串扰生成包括在芯片上进行表征，并使用原型芯片成功测量，在0.18 μ m CMOS工艺中实现。该系统易于校准，估计静态功耗约为3.5 mW。相关测试及校正车辆占用的总活动面积为0.45 mm2

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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IEEE Custom Integrated Circuits Conference 2006

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