VLSI implementation considerations for turbo decoding using a low latency log-MAP

Abstract

The soft-output Viterbi (see IEEE J. Sel. Areas in Comm., vol.16, p.260-4, 1998) algorithm (SOVA) and the log-maximum a posterior probability (log-MAP) algorithm are commonly used in turbo decoding. We propose to modify the sliding window MAP-algorithm of Viterbi to reduce the computational delay even further. We compare the simulation performance of this low latency log-MAP algorithm with the sliding window log-MAP. We also estimate the VLSI implementation complexities of the SOVA, the log-MAP and the proposed low latency log-MAP.