Computing Dataflow Architectures: History and Implementation Perspectives

Abstract

The article analyzes computational architectures with data flow controlling computations. In particular, it analyzes the reasons that prevented the formation of this promising class of architectures. The paper considered the features of algorithms in digital signal processing and the requirements from the digital signal processors. A more accurate accounting of these features allows for proposing an approach for introducing the dataflow paradigm into the DSP area. The paper considers the concept of a new multicore dataflow recurrent architecture developed at the Federal Research Center “Computer Science and Control” of the Russian Academy of Sciences. It is designed for the parallel computing implementation of real-time signal processing. This architecture is currently at the final stage of prototyping on FPGA.