{"title":"An efficient FPGA-Based architecture for convolutional neural networks","authors":"Wen-Jyi Hwang, Yun-Jie Jhang, Tsung-Ming Tai","doi":"10.1109/TSP.2017.8076054","DOIUrl":null,"url":null,"abstract":"The goal of this paper is to implement an efficient FPGA-based hardware architectures for the design of fast artificial vision systems. The proposed architecture is capable of performing classification operations of a Convolutional Neural Network (CNN) in realtime. To show the effectiveness of the architecture, some design examples such as hand posture recognition, character recognition, and face recognition are provided. Experimental results show that the proposed architecture is well suited for embedded artificial computer vision systems requiring high portability, high computational speed, and accurate classification.","PeriodicalId":256818,"journal":{"name":"2017 40th International Conference on Telecommunications and Signal Processing (TSP)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 40th International Conference on Telecommunications and Signal Processing (TSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TSP.2017.8076054","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The goal of this paper is to implement an efficient FPGA-based hardware architectures for the design of fast artificial vision systems. The proposed architecture is capable of performing classification operations of a Convolutional Neural Network (CNN) in realtime. To show the effectiveness of the architecture, some design examples such as hand posture recognition, character recognition, and face recognition are provided. Experimental results show that the proposed architecture is well suited for embedded artificial computer vision systems requiring high portability, high computational speed, and accurate classification.