Evaluating metastability in electronic circuits for random number generation

Abstract

This paper presents a method for evaluating the metastability of a flip-flop circuit for random number generation applications. It is well known that digital circuits can exhibit metastable behavior when the input to a flip-flop is asynchronous to the system clock. In the past, extensive research has been focused on eliminating metastability in digital systems. Here, we present some preliminary results of our research to exploit metastable behavior in sequential logic circuits to produce random bit streams for random number generation. In particular, we explore the idea of tapping the electronic noise present in D-type flip-flops to produce random bit streams for use as a one-time cryptographic key-pad for encryption algorithms. This research will serve as a basis for further research into the very-large-scale-integration (VLSI) of random number generators (RNGs).