Persistence Management Model for Dynamically Reconfigurable Hardware

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools Pub Date : 2010-09-01 DOI:10.1109/DSD.2010.90

J. Dondo, Fernando Rincón Calle, Jesús Barba, F. Moya, Francisco Sánchez, J. C. López

引用次数: 7

Abstract

This document presents a persistence management model for reconfigurable SoC. This model provides an efficient mechanism for persistence to preserve data information of hardware components that are swapped out of dynamically reconfigurable areas, in order to allow the reinsertion of these components and to restart the execution path from the same point where they were interrupted when reinserted. This mechanism allows state management of components instantiated not only in reconfigurable areas, but also for those instantiated in static areas, that are feasible to be stopped and replaced for new versions instantiated in hardware or implemented in software migrating their state to the new ones.

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动态可重构硬件的持久性管理模型

本文提出了一个可重构SoC的持久性管理模型。该模型提供了一种有效的持久性机制，用于保存从动态可重构区域交换出的硬件组件的数据信息，以便允许重新插入这些组件，并从重新插入时中断它们的同一点重新启动执行路径。该机制不仅允许在可重构区域中实例化组件的状态管理，还允许在静态区域中实例化组件的状态管理，这些组件可以在硬件中实例化的新版本中停止和替换，或者在软件中实现将其状态迁移到新版本。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools

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