Defying the speed of light:: a spatially-aware compiler for wire-exposed architectures

Abstract

With the increasing miniaturization of transistors, wire delays are becoming a dominant factor in microprocessor performance. To address this issue, a number of emerging architectures contain replicated processing units with software-exposed communication between one unit and another (e.g., Raw, SmartMemories, TRIPS). However, for them to be effective, it is necessary to use languages that circumvent the von Neumann bottleneck, inherent in current programming languages such as C, C++ and Java.In the first part of the talk, I will introduce StreamIt, a streaming language that is ideally suited for wire-exposed architectures. StreamIt provides novel high-level representations to improve programmer productivity and program robustness within the streaming domain. At the same time, StreamIt exposes the inherent communication pattern of the program, allowing the compiler to aggressively optimize and effectively utilize wire-exposed architectures. .In the second part of the talk, I will describe our compiler from StreamIt to the Raw processor. Though StreamIt exposes the parallelism and communication patterns of stream programs, much analysis is needed to adapt a stream program to a wire-exposed processor. These include fission and fusion transformations that is used to adjust the granularity of a stream graph, a layout algorithm for mapping a stream graph to a given network topology, and a scheduling algorithm for generating a fine-grained static communication pattern for each computational element.