Radix-8 Digit-by-Rounding: Achieving High-Performance Reciprocals, Square Roots, and Reciprocal Square Roots

J. A. Butts, P. T. P. Tang, R. Dror, D. Shaw
{"title":"Radix-8 Digit-by-Rounding: Achieving High-Performance Reciprocals, Square Roots, and Reciprocal Square Roots","authors":"J. A. Butts, P. T. P. Tang, R. Dror, D. Shaw","doi":"10.1109/ARITH.2011.28","DOIUrl":null,"url":null,"abstract":"We describe a high-performance digit-recurrence algorithm for computing exactly rounded reciprocals, square roots, and reciprocal square roots in hardware at a rate of three result bits -- one radix-8 digit -- per recurrence iteration. To achieve a single-cycle recurrence at a short cycle time, we adapted the digit-by-rounding algorithm, which is normally applied at much higher radices, for efficient operation at radix 8. Using this approach avoids in the recurrence step the lookup table required by SRT -- the usual algorithm used for hardware digit recurrences. The increasing access latency of this table, the size of which grows super linearly in the radix, limits high-frequency SRT implementations to radix 4 or lower. We also developed a series of novel optimizations focused on further reducing the critical path through the recurrence. We propose, for example, decreasing data path widths to a point where erroneous results sometimes occur and then correcting these errors off the critical path. We present a specific implementation that computes any of these functions to 31 bits of precision in 13 cycles. Our implementation achieves a cycle time only 11% longer than the best reported SRT design for the same functions, yet delivers results in five fewer cycles. Finally, we show that even at lower radices, a digit-by-rounding design is likely to have a shorter critical path than one using SRT at the same radix.","PeriodicalId":272151,"journal":{"name":"2011 IEEE 20th Symposium on Computer Arithmetic","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 20th Symposium on Computer Arithmetic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARITH.2011.28","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

We describe a high-performance digit-recurrence algorithm for computing exactly rounded reciprocals, square roots, and reciprocal square roots in hardware at a rate of three result bits -- one radix-8 digit -- per recurrence iteration. To achieve a single-cycle recurrence at a short cycle time, we adapted the digit-by-rounding algorithm, which is normally applied at much higher radices, for efficient operation at radix 8. Using this approach avoids in the recurrence step the lookup table required by SRT -- the usual algorithm used for hardware digit recurrences. The increasing access latency of this table, the size of which grows super linearly in the radix, limits high-frequency SRT implementations to radix 4 or lower. We also developed a series of novel optimizations focused on further reducing the critical path through the recurrence. We propose, for example, decreasing data path widths to a point where erroneous results sometimes occur and then correcting these errors off the critical path. We present a specific implementation that computes any of these functions to 31 bits of precision in 13 cycles. Our implementation achieves a cycle time only 11% longer than the best reported SRT design for the same functions, yet delivers results in five fewer cycles. Finally, we show that even at lower radices, a digit-by-rounding design is likely to have a shorter critical path than one using SRT at the same radix.
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基数-8位四舍五入:实现高性能的倒数、平方根和倒数平方根
我们描述了一种高性能的数字递归算法,用于在硬件中以每次递归迭代的三个结果位(一个基数-8位)的速率精确计算舍入倒数、平方根和倒数平方根。为了在短周期时间内实现单周期递归,我们采用了通常应用于更高基数的舍入算法,以便在基数8上进行有效操作。使用这种方法可以避免在递归步骤中使用SRT所需的查找表——SRT是用于硬件数字递归的常用算法。这个表的访问延迟不断增加,它的大小在基数中呈超线性增长,这限制了高频SRT实现的基数为4或更低。我们还开发了一系列新的优化方法,重点是通过递归进一步减少关键路径。例如,我们建议将数据路径宽度减小到有时会出现错误结果的程度,然后在关键路径上纠正这些错误。我们提出了一个具体的实现,在13个周期内将这些函数中的任何一个计算到31位精度。对于相同的功能,我们的实现实现的周期时间仅比目前报道的最佳SRT设计长11%,但交付结果的周期却少了5个。最后,我们表明,即使在较低的基数下,按四舍五入的数字设计可能比在相同基数下使用SRT的设计具有更短的关键路径。
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