{"title":"A novel vertical deep trench RESURF DMOS (VTR-DMOS)","authors":"J. Glenn, J. Siekkinen","doi":"10.1109/ISPSD.2000.856805","DOIUrl":null,"url":null,"abstract":"A new super junction (SJ)-DMOS device, the vertical deep trench RESURF DMOS or VTR-DMOS, is proposed. The VTR-DMOS is a conventional vertical N-channel DMOS with a deep trench adjacent to the gate. The trench creates a vertical sidewall into which boron is solid source diffused to form a P-type doping pillar which is charge balanced to the N-type epitaxial drift region. 2-D simulations comparing a VTR-DMOS to a conventional VDMOS indicate a 5.5/spl times/ improvement in silicon-only Rsp for a BVdss>700 V.","PeriodicalId":260241,"journal":{"name":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2000.856805","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22
Abstract
A new super junction (SJ)-DMOS device, the vertical deep trench RESURF DMOS or VTR-DMOS, is proposed. The VTR-DMOS is a conventional vertical N-channel DMOS with a deep trench adjacent to the gate. The trench creates a vertical sidewall into which boron is solid source diffused to form a P-type doping pillar which is charge balanced to the N-type epitaxial drift region. 2-D simulations comparing a VTR-DMOS to a conventional VDMOS indicate a 5.5/spl times/ improvement in silicon-only Rsp for a BVdss>700 V.