A 10Gsps TIADC with Mismatch Error Correction Based on Phase-Adjustment Method

Abstract

Time-interleaved analog-to-digital conversion (TIADC) is one of the generic waveform digitization techniques in high-speed signal measurement. However, the dynamic performance of TIADC system will be inevitably deteriorated by the mismatch error between different ADC channels because of the uncertain skews between clocks. This paper proposes a fast skew adjustment method to adjust the phase differences between the high-speed clocks to ideal degrees. We designed a TIADC data acquisition system with lOGsps sampling rate based on this phase adjustment method. In addition, this method can also be applied to address the synchronous clock alignment problem. Good performance was demonstrated in an experiment.