On-chip Spiral Inductors With Patterned Ground Shields For Si-based RF IC's

C. P. Yue, S. Wong
{"title":"On-chip Spiral Inductors With Patterned Ground Shields For Si-based RF IC's","authors":"C. P. Yue, S. Wong","doi":"10.1109/VLSIC.1997.623819","DOIUrl":null,"url":null,"abstract":"This paper presents a patterned ground shield in- serted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1-2 GHz, the addition of the shield increases the inductor quality factor up to 33% and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz tank can be nearly doubled with a shielded inductor. In this paper, we present a patterned ground shield, which is compatible with standard silicon technologies, to reduce the unwanted substrate effects. To provide some background, Section II presents a discussion on the fundamental definitions of an inductor and an tank . Next, a physical model for spiral inductors on silicon is described. The magnetic energy storage and loss mechanisms in an on-chip inductor are discussed. Based on this insight, it is shown that energy loss can be reduced by shielding the electric field of the inductor from the silicon substrate. Then, the drawbacks of a solid ground shield are analyzed. This leads to the design of a patterned ground shield. Design guidelines for parameters such as shield pattern and resistance are given. In Section III, experiment design, on-wafer testing technique, and parasitic extraction procedure are presented. Experimental results are then reported to study the effects of shield resistance and pattern on inductance, parasitic resistances and capacitances, and inductor . Next, the improvement in of a 2-GHz tank using a shielded inductor is illustrated. A study of the noise coupling between two adjacent inductors and the efficiency of the ground shield for isolation are also presented. Lastly, Section IV gives some conclusions.","PeriodicalId":175678,"journal":{"name":"Symposium 1997 on VLSI Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1294","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1997 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1997.623819","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1294

Abstract

This paper presents a patterned ground shield in- serted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1-2 GHz, the addition of the shield increases the inductor quality factor up to 33% and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz tank can be nearly doubled with a shielded inductor. In this paper, we present a patterned ground shield, which is compatible with standard silicon technologies, to reduce the unwanted substrate effects. To provide some background, Section II presents a discussion on the fundamental definitions of an inductor and an tank . Next, a physical model for spiral inductors on silicon is described. The magnetic energy storage and loss mechanisms in an on-chip inductor are discussed. Based on this insight, it is shown that energy loss can be reduced by shielding the electric field of the inductor from the silicon substrate. Then, the drawbacks of a solid ground shield are analyzed. This leads to the design of a patterned ground shield. Design guidelines for parameters such as shield pattern and resistance are given. In Section III, experiment design, on-wafer testing technique, and parasitic extraction procedure are presented. Experimental results are then reported to study the effects of shield resistance and pattern on inductance, parasitic resistances and capacitances, and inductor . Next, the improvement in of a 2-GHz tank using a shielded inductor is illustrated. A study of the noise coupling between two adjacent inductors and the efficiency of the ground shield for isolation are also presented. Lastly, Section IV gives some conclusions.
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用于硅基射频集成电路的带图纹地屏蔽的片上螺旋电感
本文提出了一种在片上螺旋电感器和硅衬底之间嵌入图案接地屏蔽的方法。图案化地屏蔽可以在标准硅技术中实现,而无需额外的处理步骤。广泛研究了屏蔽电阻和模式对电感、寄生电阻和寄生电容以及品质因数的影响。实验结果表明,多晶硅图案化接地屏蔽的改进效果最大。在1-2 GHz时,屏蔽层的加入可将电感质量因数提高33%,并将两个相邻电感之间的衬底耦合降低多达25 dB。我们还证明,使用屏蔽电感器可以将2 ghz槽的质量因数提高近一倍。在本文中,我们提出了一种与标准硅技术兼容的图案化接地屏蔽,以减少不必要的衬底效应。为了提供一些背景知识,第二节讨论了电感器和储罐的基本定义。其次,描述了硅上螺旋电感的物理模型。讨论了片上电感的磁能存储和损耗机理。基于这一见解,表明可以通过屏蔽电感器的电场来减少硅衬底的能量损失。然后,分析了固体接地屏蔽的缺点。这导致了一个图案地屏蔽的设计。给出了屏蔽图样和电阻等参数的设计准则。第三部分介绍了实验设计、晶圆上测试技术和寄生萃取过程。实验结果研究了屏蔽电阻和图案对电感、寄生电阻和寄生电容以及电感的影响。其次,改进在一个2 ghz坦克使用屏蔽电感是说明。对相邻电感之间的噪声耦合和接地屏蔽的隔离效率进行了研究。最后,第四部分给出了一些结论。
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